1. Field of the Invention
The present invention relates to detecting circuits and, particularly, to a memory detecting circuit for a motherboard.
2. Description of the Related Art
In a computer system, a central processing unit (CPU) reads data faster than a random access memory (RAM) can deliver, and usually the CPU has to wait for the RAM to deliver data. When the RAM is unable to keep up with the CPU, however, a bottleneck occurs, leaving the CPU with nothing to process. Under a single channel mode, any CPU with a bus speed greater than the RAM speed would be susceptible to the bottleneck effect. A dual channel mode is a technique used to alleviate the problem by doubling the amount of the available memory bandwidth. Instead of the single channel mode, a second parallel channel is added in the dual channel mode. With two channels working simultaneously, the bottleneck effect is reduced. Rather than waiting for the memory technology to improve, the dual channel mode simply takes the existing memory technology and modifies the method in which it is handled. With two channels working simultaneously, more information can be retrieved from the memory in the same amount of time, and thus improving the computer system performance.
In order to achieve this, two or more memories must be installed into matching memory sockets. The memory sockets belonging to different channel are usually color coded on the motherboard. The dual channel mode should be achieved with the matching memories installed in each channel. However, the users are usually unclear about which memory sockets belong to the same channel, this is because not all memory sockets are color coded by the motherboard manufacturers. The memory configurations that do not match a dual channel conditions will revert to the single channel mode. It usually costs much time to arrange the memories to achieve the dual channel mode, for that it needs to reboot the compute to check the memory configuration information via a basic input output system (BIOS) main menu. At booting time, the memory configuration is detected and the alert message about the memories rearranged running in the dual channel mode or the single channel mode can be obtained.
What is needed, therefore, is a memory detecting circuit which can overcome the above problems.